https://rigtorp.se/ringbuffer/

https://github.com/DNedic/lockfree?tab=readme-ov-file

https://www.codeproject.com/Articles/43510/Lock-Free-Single-Producer-Single-Consumer-Circular

Alignas

 alignas(64) std::atomic<size_t> readIdx_{0};
 alignas(64) std::atomic<size_t> writeIdx_{0};

alignas is to prevent false sharing by ensuring that readIdx_ and writeIdx_ are each placed on separate cache lines. A cache line is the smallest unit of memory that a CPU cache transfers between the main memory (RAM) and the cache.

False sharing occurs when two or more threads modify different variables that happen to reside on the same CPU cache line. Even though they're logically independent, the CPU cache treats the whole line as a single unit

Ring Buffer

circular queue:

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